From 55e36bbbabc1afed172689543d507b6a25d3932c Mon Sep 17 00:00:00 2001 From: zhyinch <zhyinch@gmail.com> Date: 星期六, 07 八月 2021 09:25:22 +0800 Subject: [PATCH] 1 --- 源码/核心板/Src/OnChipDevices/Spi.c | 15 +++++---------- 1 files changed, 5 insertions(+), 10 deletions(-) diff --git "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/OnChipDevices/Spi.c" "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/OnChipDevices/Spi.c" index c2e4ab4..22dd470 100644 --- "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/OnChipDevices/Spi.c" +++ "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/OnChipDevices/Spi.c" @@ -1,4 +1,5 @@ #include "Spi.h" +#include "deca_device_api.h" void Spi_Init(void) { @@ -11,15 +12,10 @@ RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE); /* SPI GPIO setup */ - // SPIx SCK and MOSI pin setup - GPIO_InitStructure.GPIO_Pin = SPIx_SCK | SPIx_MOSI; + // SPIx SCK, MISO and MOSI pin setup + GPIO_InitStructure.GPIO_Pin = SPIx_SCK | SPIx_MOSI | SPIx_MISO; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_Init(SPIx_GPIO, &GPIO_InitStructure); - - // SPIx MISO pin setup - GPIO_InitStructure.GPIO_Pin = SPIx_MISO; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; GPIO_Init(SPIx_GPIO, &GPIO_InitStructure); // SPIx CS pin setup @@ -30,7 +26,6 @@ // Set CS high GPIO_SetBits(SPIx_CS_GPIO, SPIx_CS); - SPI_I2S_DeInit(SPIx); @@ -79,7 +74,7 @@ * Takes two separate byte buffers for write header and write data * returns 0 for success, or -1 for error */ -int writetospi_serial +int writetospi ( uint16_t headerLength, const uint8_t *headerBuffer, @@ -130,7 +125,7 @@ * returns the offset into read buffer where first byte of read data may be found, * or returns -1 if there was an error */ -int readfromspi_serial +int readfromspi ( uint16_t headerLength, const uint8_t *headerBuffer, -- Gitblit v1.9.3