From 7bd852c98c52c306e3628acedc33149ebee3cff6 Mon Sep 17 00:00:00 2001
From: guanjiao <sqrgj@163.com>
Date: 星期六, 12 五月 2018 23:35:39 +0800
Subject: [PATCH] format all the code
---
源码/核心板/Src/decadriver/deca_device_api.h | 150 +++++++++++++++++++++++++------------------------
1 files changed, 76 insertions(+), 74 deletions(-)
diff --git "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_device_api.h" "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_device_api.h"
index f04c639..032fbbd 100644
--- "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_device_api.h"
+++ "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_device_api.h"
@@ -167,26 +167,28 @@
#define DWT_OPSET_TIGHT 0x1
#define DWT_OPSET_DEFLT 0x2
-typedef struct{
+typedef struct
+{
- uint32 status; //initial value of register as ISR is entered
- uint8 event; //event type
- uint8 aatset; //auto ACK TX bit is set
- uint16 datalength; //length of frame
- uint8 fctrl[2]; //frame control bytes
- uint8 dblbuff ; //set if double buffer is enabled
+ uint32 status; //initial value of register as ISR is entered
+ uint8 event; //event type
+ uint8 aatset; //auto ACK TX bit is set
+ uint16 datalength; //length of frame
+ uint8 fctrl[2]; //frame control bytes
+ uint8 dblbuff ; //set if double buffer is enabled
-}dwt_callback_data_t;
+} dwt_callback_data_t;
-typedef enum {
- CHAN_CTRL_TXCHAN_1 = 0x01, /* Selects the transmit channel 1 */
- CHAN_CTRL_TXCHAN_2 = 0x02, /* Selects the transmit channel 2 */
- CHAN_CTRL_TXCHAN_3 = 0x03, /* Selects the transmit channel 3 */
- CHAN_CTRL_TXCHAN_4 = 0x04, /* Selects the transmit channel 4 */
- CHAN_CTRL_TXCHAN_5 = 0x05, /* Selects the transmit channel 5 */
- CHAN_CTRL_TXCHAN_7 = 0x07 /* Selects the transmit channel 7 */
-}eCHAN;
+typedef enum
+{
+ CHAN_CTRL_TXCHAN_1 = 0x01, /* Selects the transmit channel 1 */
+ CHAN_CTRL_TXCHAN_2 = 0x02, /* Selects the transmit channel 2 */
+ CHAN_CTRL_TXCHAN_3 = 0x03, /* Selects the transmit channel 3 */
+ CHAN_CTRL_TXCHAN_4 = 0x04, /* Selects the transmit channel 4 */
+ CHAN_CTRL_TXCHAN_5 = 0x05, /* Selects the transmit channel 5 */
+ CHAN_CTRL_TXCHAN_7 = 0x07 /* Selects the transmit channel 7 */
+} eCHAN;
/*! ------------------------------------------------------------------------------------------------------------------
@@ -209,19 +211,19 @@
uint8 dataRate ; //!< Data Rate {DWT_BR_110K, DWT_BR_850K or DWT_BR_6M8}
uint8 phrMode ; //!< PHR mode {0x0 - standard DWT_PHRMODE_STD, 0x3 - extended frames DWT_PHRMODE_EXT}
uint16 sfdTO ; //!< SFD timeout value (in symbols)
-}__attribute__ ((packed)) dwt_config_t ;
+} __attribute__ ((packed)) dwt_config_t ;
#pragma pack()
typedef struct
{
- uint8 PGdly;
- //TX POWER
- //31:24 BOOST_0.125ms_PWR
- //23:16 BOOST_0.25ms_PWR-TX_SHR_PWR
- //15:8 BOOST_0.5ms_PWR-TX_PHR_PWR
- //7:0 DEFAULT_PWR-TX_DATA_PWR
- uint32 power;
+ uint8 PGdly;
+ //TX POWER
+ //31:24 BOOST_0.125ms_PWR
+ //23:16 BOOST_0.25ms_PWR-TX_SHR_PWR
+ //15:8 BOOST_0.5ms_PWR-TX_PHR_PWR
+ //7:0 DEFAULT_PWR-TX_DATA_PWR
+ uint32 power;
}
dwt_txconfig_t ;
@@ -229,33 +231,33 @@
typedef struct
{
- uint16 maxNoise ; // LDE max value of noise
- uint16 firstPathAmp1 ; // Amplitude at floor(index FP) + 1
- uint16 stdNoise ; // Standard deviation of noise
- uint16 firstPathAmp2 ; // Amplitude at floor(index FP) + 2
- uint16 firstPathAmp3 ; // Amplitude at floor(index FP) + 3
- uint16 maxGrowthCIR ; // Channel Impulse Response max growth CIR
+ uint16 maxNoise ; // LDE max value of noise
+ uint16 firstPathAmp1 ; // Amplitude at floor(index FP) + 1
+ uint16 stdNoise ; // Standard deviation of noise
+ uint16 firstPathAmp2 ; // Amplitude at floor(index FP) + 2
+ uint16 firstPathAmp3 ; // Amplitude at floor(index FP) + 3
+ uint16 maxGrowthCIR ; // Channel Impulse Response max growth CIR
uint16 rxPreamCount ; // Count of preamble symbols accumulated
//uint32 debug1;
//uint32 debug2;
uint16 firstPath ; // First path index (10.6 bits fixed point integer)
-}dwt_rxdiag_t ;
+} dwt_rxdiag_t ;
typedef struct
{
- //all of the below are mapped to a 12-bit register in DW1000
+ //all of the below are mapped to a 12-bit register in DW1000
uint16 PHE ; //number of received header errors
- uint16 RSL ; //number of received frame sync loss events
+ uint16 RSL ; //number of received frame sync loss events
uint16 CRCG ; //number of good CRC received frames
uint16 CRCB ; //number of bad CRC (CRC error) received frames
- uint16 ARFE ; //number of address filter errors
- uint16 OVER ; //number of receiver overflows (used in double buffer mode)
+ uint16 ARFE ; //number of address filter errors
+ uint16 OVER ; //number of receiver overflows (used in double buffer mode)
uint16 SFDTO ; //SFD timeouts
uint16 PTO ; //Preamble timeouts
uint16 RTO ; //RX frame wait timeouts
uint16 TXF ; //number of transmitted frames
- uint16 HPW ; //half period warn
+ uint16 HPW ; //half period warn
uint16 TXW ; //power up warn
} dwt_deviceentcnts_t ;
@@ -541,7 +543,7 @@
*
* no return value
*/
-void dwt_readtxtimestamp(uint8 * timestamp);
+void dwt_readtxtimestamp(uint8 *timestamp);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_readtxtimestamphi32()
@@ -581,7 +583,7 @@
*
* no return value
*/
-void dwt_readrxtimestamp(uint8 * timestamp);
+void dwt_readrxtimestamp(uint8 *timestamp);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_readrxtimestamphi32()
@@ -635,7 +637,7 @@
*
* no return value
*/
-void dwt_readsystime(uint8 * timestamp);
+void dwt_readsystime(uint8 *timestamp);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_checkoverrun()
@@ -802,41 +804,41 @@
*
* no return value
*/
- void dwt_configuresleepcnt(uint16 sleepcnt);
+void dwt_configuresleepcnt(uint16 sleepcnt);
- /*! ------------------------------------------------------------------------------------------------------------------
- * @fn dwt_configuresleep()
- *
- * @brief configures the device for both DEEP_SLEEP and SLEEP modes, and on-wake mode
- * i.e. before entering the sleep, the device should be programmed for TX or RX, then upon "waking up" the TX/RX settings
- * will be preserved and the device can immediately perform the desired action TX/RX
- *
- * NOTE: e.g. Tag operation - after deep sleep, the device needs to just load the TX buffer and send the frame
- *
- *
- * mode: the array and LDE code (OTP/ROM) and LDO tune, and set sleep persist
- * DWT_PRESRV_SLEEP 0x0100 - preserve sleep
- * DWT_LOADOPSET 0x0080 - load operating parameter set on wakeup
- * DWT_CONFIG 0x0040 - download the AON array into the HIF (configuration download)
- * DWT_LOADEUI 0x0008
- * DWT_GOTORX 0x0002
- * DWT_TANDV 0x0001
- *
- * wake: wake up parameters
- * DWT_XTAL_EN 0x10 - keep XTAL running during sleep
- * DWT_WAKE_SLPCNT 0x8 - wake up after sleep count
- * DWT_WAKE_CS 0x4 - wake up on chip select
- * DWT_WAKE_WK 0x2 - wake up on WAKEUP PIN
- * DWT_SLP_EN 0x1 - enable sleep/deep sleep functionality
- *
- * input parameters
- * @param mode - config on-wake parameters
- * @param wake - config wake up parameters
- *
- * output parameters
- *
- * no return value
- */
+/*! ------------------------------------------------------------------------------------------------------------------
+ * @fn dwt_configuresleep()
+ *
+ * @brief configures the device for both DEEP_SLEEP and SLEEP modes, and on-wake mode
+ * i.e. before entering the sleep, the device should be programmed for TX or RX, then upon "waking up" the TX/RX settings
+ * will be preserved and the device can immediately perform the desired action TX/RX
+ *
+ * NOTE: e.g. Tag operation - after deep sleep, the device needs to just load the TX buffer and send the frame
+ *
+ *
+ * mode: the array and LDE code (OTP/ROM) and LDO tune, and set sleep persist
+ * DWT_PRESRV_SLEEP 0x0100 - preserve sleep
+ * DWT_LOADOPSET 0x0080 - load operating parameter set on wakeup
+ * DWT_CONFIG 0x0040 - download the AON array into the HIF (configuration download)
+ * DWT_LOADEUI 0x0008
+ * DWT_GOTORX 0x0002
+ * DWT_TANDV 0x0001
+ *
+ * wake: wake up parameters
+ * DWT_XTAL_EN 0x10 - keep XTAL running during sleep
+ * DWT_WAKE_SLPCNT 0x8 - wake up after sleep count
+ * DWT_WAKE_CS 0x4 - wake up on chip select
+ * DWT_WAKE_WK 0x2 - wake up on WAKEUP PIN
+ * DWT_SLP_EN 0x1 - enable sleep/deep sleep functionality
+ *
+ * input parameters
+ * @param mode - config on-wake parameters
+ * @param wake - config wake up parameters
+ *
+ * output parameters
+ *
+ * no return value
+ */
void dwt_configuresleep(uint16 mode, uint8 wake);
/*! ------------------------------------------------------------------------------------------------------------------
@@ -1162,7 +1164,7 @@
*
* no return value
*/
-void dwt_readdiagnostics(dwt_rxdiag_t * diagnostics);
+void dwt_readdiagnostics(dwt_rxdiag_t *diagnostics);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_loadopsettabfromotp()
--
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