From 8770b97111b845632246b08696f4362f6e88a5ee Mon Sep 17 00:00:00 2001
From: guanjiao <sqrgj@163.com>
Date: 星期六, 15 九月 2018 20:31:25 +0800
Subject: [PATCH] Merge branch 'dev_zyc' into Merge_anchor_and_tag
---
源码/核心板/Src/OnChipDevices/RTC.c | 68 ++++++++++++++++++++++++++++++++++
1 files changed, 68 insertions(+), 0 deletions(-)
diff --git "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/OnChipDevices/RTC.c" "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/OnChipDevices/RTC.c"
new file mode 100644
index 0000000..c952803
--- /dev/null
+++ "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/OnChipDevices/RTC.c"
@@ -0,0 +1,68 @@
+#include "RTC.h"
+
+
+void RTC_SET_ALARM(u32 sec)
+{
+ //DEBUG_COM_STREAM("-??-",NULL);
+ RTC_SetAlarm(RTC_GetCounter()+sec);
+ //DEBUG_COM_STREAM("-??1-",NULL);
+ RTC_WaitForLastTask();
+ //DEBUG_COM_STREAM("-??2-",NULL);
+ RTC_ITConfig(RTC_FLAG_ALR,ENABLE);
+}
+
+void RTC_Configuration(void)
+{
+ EXTI_InitTypeDef EXTI_InitStructure;
+
+ /* Enable PWR and BKP clocks */
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE);
+
+ /* Allow access to BKP Domain */
+ PWR_BackupAccessCmd(ENABLE);
+
+ /* Reset Backup Domain */
+ //BKP_DeInit();
+
+ RCC_LSICmd(ENABLE);
+ /* Enable LSE */
+ //RCC_LSEConfig(RCC_LSE_ON);
+ /* Wait till LSE is ready */
+ while (RCC_GetFlagStatus(RCC_FLAG_LSIRDY) == RESET){}
+
+ /* Select LSE as RTC Clock Source */
+ RCC_RTCCLKConfig(RCC_RTCCLKSource_LSI);
+
+ /* Enable RTC Clock */
+ RCC_RTCCLKCmd(ENABLE);
+
+ /* Wait for RTC registers synchronization */
+ RTC_WaitForSynchro();
+
+ /* Wait until last write operation on RTC registers has finished */
+ RTC_WaitForLastTask();
+
+ /* Enable the RTC Second */
+ //RTC_ITConfig(RTC_IT_SEC, ENABLE);
+
+ /* Wait until last write operation on RTC registers has finished */
+ RTC_WaitForLastTask();
+
+ RTC_ITConfig(RTC_IT_ALR,ENABLE); //?? RTC ???
+ RTC_WaitForLastTask();
+ /* Set RTC prescaler: set RTC period to 1sec */
+ RTC_SetPrescaler(40000); /* RTC period = RTCCLK/RTC_PR = (32.768 KHz)/(32767+1) */
+
+ /* Wait until last write operation on RTC registers has finished */
+ RTC_WaitForLastTask();
+ RTC_SET_ALARM(1);
+
+ //RTC外部中断使能
+ EXTI_InitStructure.EXTI_Line = EXTI_Line17;
+ EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
+ EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising;
+ EXTI_InitStructure.EXTI_LineCmd = ENABLE;
+ EXTI_Init(&EXTI_InitStructure);
+
+}
+
--
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