From 96a63685fd53bd939772377296a9e732333e3748 Mon Sep 17 00:00:00 2001
From: zhyinch <zhyinch@gmail.com>
Date: 星期一, 28 三月 2022 10:23:16 +0800
Subject: [PATCH] V2.47 可能有无法接收数据的bug
---
源码/核心板/Src/decadriver/deca_device.c | 15 +++++++++++----
1 files changed, 11 insertions(+), 4 deletions(-)
diff --git "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_device.c" "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_device.c"
index e0a39e8..9929e5e 100644
--- "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_device.c"
+++ "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_device.c"
@@ -110,8 +110,10 @@
#define VTEMP_ADDRESS (0x09)
#define XTRIM_ADDRESS (0x1E)
u8 module_power;
+uint32_t status_reg = 0;
int dwt_initialise(uint16_t config)
{
+
u32 power_temp,power_input;
uint8_t plllockdetect = EC_CTRL_PLLLCK;
uint16_t otp_addr = 0;
@@ -125,15 +127,17 @@
dw1000local.dwt_txcallback = NULL ;
dw1000local.dwt_rxcallback = NULL ;
-
+status_reg = dwt_read32bitreg(SYS_STATUS_ID);
+ status_reg = dwt_read32bitreg(SYS_STATUS_ID);
// Read and validate device ID return -1 if not recognised
dw1000local.deviceID = dwt_readdevid() ;
while (DWT_DEVICE_ID != dw1000local.deviceID) // MP IC ONLY (i.e. DW1000) FOR THIS CODE
{
dw1000local.deviceID = dwt_readdevid() ;
}
-
+status_reg = dwt_read32bitreg(SYS_STATUS_ID);
_dwt_enableclocks(FORCE_SYS_XTI); // NOTE: set system clock to XTI - this is necessary to make sure the values read by _dwt_otpread are reliable
+ status_reg = dwt_read32bitreg(SYS_STATUS_ID);
if(module_power>67)
{module_power=67;}
if(module_power<0)
@@ -152,7 +156,7 @@
// Read OTP revision number
otp_addr = _dwt_otpread(XTRIM_ADDRESS) & 0xffff; // Read 32 bit value, XTAL trim val is in low octet-0 (5 bits)
dw1000local.otprev = (otp_addr >> 8) & 0xff; // OTP revision is next byte
-
+status_reg = dwt_read32bitreg(SYS_STATUS_ID);
// Load LDO tune from OTP and kick it if there is a value actually programmed.
ldo_tune = _dwt_otpread(LDOTUNE_ADDRESS);
if((ldo_tune & 0xFF) != 0)
@@ -166,7 +170,7 @@
// Load Part and Lot ID from OTP
dw1000local.partID = _dwt_otpread(PARTID_ADDRESS);
dw1000local.lotID = _dwt_otpread(LOTID_ADDRESS);
-
+status_reg = dwt_read32bitreg(SYS_STATUS_ID);
// XTAL trim value is set in OTP for DW1000 module and EVK/TREK boards but that might not be the case in a custom design
dw1000local.xtrim = otp_addr & 0x1F;
if (!dw1000local.xtrim) // A value of 0 means that the crystal has not been trimmed
@@ -176,6 +180,8 @@
// Configure XTAL trim
dwt_xtaltrim(dw1000local.xtrim);
+ status_reg = dwt_read32bitreg(SYS_STATUS_ID);
+
// Load leading edge detect code
if(config & DWT_LOADUCODE)
{
@@ -202,6 +208,7 @@
dwt_write16bitoffsetreg(PMSC_ID,PMSC_TXFINESEQ_OFFSET ,PMSC_TXFINESEQ_DIS_MASK);
}
+ dw1000local.deviceID = dwt_readdevid() ;
return DWT_SUCCESS ;
} // end dwt_initialise()
--
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