From a2cae4f3385f728da201750ea304f362d8ad85a9 Mon Sep 17 00:00:00 2001
From: zhyinch <zhyinch@gmail.com>
Date: 星期六, 11 七月 2020 13:25:07 +0800
Subject: [PATCH] 修改输出格式,和标签ID BUG。华星测试没问题

---
 源码/核心板/Src/decadriver/deca_device.c |   27 +++++++++++++++++++++++----
 1 files changed, 23 insertions(+), 4 deletions(-)

diff --git "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_device.c" "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_device.c"
index 50fa0c1..e0a39e8 100644
--- "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_device.c"
+++ "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_device.c"
@@ -109,9 +109,10 @@
 #define VBAT_ADDRESS   (0x08)
 #define VTEMP_ADDRESS  (0x09)
 #define XTRIM_ADDRESS  (0x1E)
-
+u8 module_power;
 int dwt_initialise(uint16_t config)
 {
+		u32 power_temp,power_input;
     uint8_t plllockdetect = EC_CTRL_PLLLCK;
     uint16_t otp_addr = 0;
     uint32_t ldo_tune = 0;
@@ -133,8 +134,18 @@
     }
 
     _dwt_enableclocks(FORCE_SYS_XTI); // NOTE: set system clock to XTI - this is necessary to make sure the values read by _dwt_otpread are reliable
-
-    dwt_write32bitreg(TX_POWER_ID, 0x1f1f1f1f);
+		if(module_power>67)
+			{module_power=67;}
+			if(module_power<0)
+			{module_power=0;}
+			if(module_power>36)
+			{
+				power_temp =(module_power-36);
+			}else{
+				power_temp = ((6-(module_power/6))<<5)|(module_power%6);
+			}
+    power_input= power_temp<<24|power_temp<<16|power_temp<<8|power_temp;
+	  dwt_write32bitreg(TX_POWER_ID, power_input);
     // Configure the CPLL lock detect
     dwt_writetodevice(EXT_SYNC_ID, EC_CTRL_OFFSET, 1, &plllockdetect);
 
@@ -182,7 +193,15 @@
 
     // Read system register / store local copy
     dw1000local.sysCFGreg = dwt_read32bitreg(SYS_CFG_ID) ; // Read sysconfig register
-
+	{
+		uint32_t reg;
+		reg = dwt_read32bitreg(GPIO_CTRL_ID);
+		reg |= 0x00014000;
+		reg |= 0x00050000;
+		dwt_write32bitreg(GPIO_CTRL_ID,reg);
+		dwt_write16bitoffsetreg(PMSC_ID,PMSC_TXFINESEQ_OFFSET ,PMSC_TXFINESEQ_DIS_MASK);
+	
+	}
     return DWT_SUCCESS ;
 
 } // end dwt_initialise()

--
Gitblit v1.9.3