From aaf7e4ef5c1aa0535940531f20e4846cbcd39b69 Mon Sep 17 00:00:00 2001
From: zhyinch <zhyinch@gmail.com>
Date: 星期一, 04 十一月 2019 19:48:15 +0800
Subject: [PATCH] Merge branch '基站测距' into ALPHAV1
---
源码/核心板/Src/OnChipDevices/Spi.c | 115 +++++++++++++++++++++++++++++++++++++++++++++++++++++----
1 files changed, 107 insertions(+), 8 deletions(-)
diff --git "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/OnChipDevices/Spi.c" "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/OnChipDevices/Spi.c"
index 04ee781..22dd470 100644
--- "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/OnChipDevices/Spi.c"
+++ "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/OnChipDevices/Spi.c"
@@ -1,4 +1,5 @@
#include "Spi.h"
+#include "deca_device_api.h"
void Spi_Init(void)
{
@@ -11,15 +12,10 @@
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE);
/* SPI GPIO setup */
- // SPIx SCK and MOSI pin setup
- GPIO_InitStructure.GPIO_Pin = SPIx_SCK | SPIx_MOSI;
+ // SPIx SCK, MISO and MOSI pin setup
+ GPIO_InitStructure.GPIO_Pin = SPIx_SCK | SPIx_MOSI | SPIx_MISO;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
- GPIO_Init(SPIx_GPIO, &GPIO_InitStructure);
-
- // SPIx MISO pin setup
- GPIO_InitStructure.GPIO_Pin = SPIx_MISO;
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
GPIO_Init(SPIx_GPIO, &GPIO_InitStructure);
// SPIx CS pin setup
@@ -30,7 +26,6 @@
// Set CS high
GPIO_SetBits(SPIx_CS_GPIO, SPIx_CS);
-
SPI_I2S_DeInit(SPIx);
@@ -71,3 +66,107 @@
/* Write to SPIx CR1 */
SPIx->CR1 = tmpreg;
}
+
+/*! ------------------------------------------------------------------------------------------------------------------
+ * Function: writetospi()
+ *
+ * Low level abstract function to write to the SPI
+ * Takes two separate byte buffers for write header and write data
+ * returns 0 for success, or -1 for error
+ */
+int writetospi
+(
+ uint16_t headerLength,
+ const uint8_t *headerBuffer,
+ uint32_t bodylength,
+ const uint8_t *bodyBuffer
+)
+{
+
+ int i = 0;
+
+ decaIrqStatus_t stat ;
+
+ stat = decamutexon() ;
+
+ SPIx_CS_GPIO->BRR = SPIx_CS;
+
+ for(i = 0; i < headerLength; i++)
+ {
+ SPIx->DR = headerBuffer[i];
+
+ while ((SPIx->SR & SPI_I2S_FLAG_RXNE) == (uint16_t)RESET);
+
+ SPIx->DR ;
+ }
+
+ for(i = 0; i < bodylength; i++)
+ {
+ SPIx->DR = bodyBuffer[i];
+
+ while((SPIx->SR & SPI_I2S_FLAG_RXNE) == (uint16_t)RESET);
+
+ SPIx->DR ;
+ }
+
+ SPIx_CS_GPIO->BSRR = SPIx_CS;
+
+ decamutexoff(stat) ;
+
+ return 0;
+} // end writetospi()
+
+
+/*! ------------------------------------------------------------------------------------------------------------------
+ * Function: readfromspi()
+ *
+ * Low level abstract function to read from the SPI
+ * Takes two separate byte buffers for write header and read data
+ * returns the offset into read buffer where first byte of read data may be found,
+ * or returns -1 if there was an error
+ */
+int readfromspi
+(
+ uint16_t headerLength,
+ const uint8_t *headerBuffer,
+ uint32_t readlength,
+ uint8_t *readBuffer
+)
+{
+
+ int i = 0;
+
+ decaIrqStatus_t stat ;
+
+ stat = decamutexon() ;
+
+ /* Wait for SPIx Tx buffer empty */
+ //while (port_SPIx_busy_sending());
+
+ SPIx_CS_GPIO->BRR = SPIx_CS;
+
+ for(i = 0; i < headerLength; i++)
+ {
+ SPIx->DR = headerBuffer[i];
+
+ while((SPIx->SR & SPI_I2S_FLAG_RXNE) == (uint16_t)RESET);
+
+ readBuffer[0] = SPIx->DR ; // Dummy read as we write the header
+ }
+
+ for(i = 0; i < readlength; i++)
+ {
+ SPIx->DR = 0; // Dummy write as we read the message body
+
+ while((SPIx->SR & SPI_I2S_FLAG_RXNE) == (uint16_t)RESET);
+
+ readBuffer[i] = SPIx->DR ;//port_SPIx_receive_data(); //this clears RXNE bit
+ }
+
+ SPIx_CS_GPIO->BSRR = SPIx_CS;
+
+ decamutexoff(stat) ;
+
+ return 0;
+} // end readfromspi()
+
--
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