From b39d4533b3040949df437d6a14a674ca16d0aae6 Mon Sep 17 00:00:00 2001
From: zhyinch <zhyinch@gmail.com>
Date: 星期三, 17 十一月 2021 17:33:45 +0800
Subject: [PATCH] V2.44 基站输出所有数据
---
源码/核心板/MDK-ARM/Project.uvoptx | 57 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
1 files changed, 56 insertions(+), 1 deletions(-)
diff --git "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/MDK-ARM/Project.uvoptx" "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/MDK-ARM/Project.uvoptx"
index 8c53990..d7271d2 100644
--- "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/MDK-ARM/Project.uvoptx"
+++ "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/MDK-ARM/Project.uvoptx"
@@ -285,6 +285,61 @@
<WinNumber>1</WinNumber>
<ItemText>ttt</ItemText>
</Ww>
+ <Ww>
+ <count>24</count>
+ <WinNumber>1</WinNumber>
+ <ItemText>pwtag.remain_time</ItemText>
+ </Ww>
+ <Ww>
+ <count>25</count>
+ <WinNumber>1</WinNumber>
+ <ItemText>pwtag</ItemText>
+ </Ww>
+ <Ww>
+ <count>26</count>
+ <WinNumber>1</WinNumber>
+ <ItemText>status_reg</ItemText>
+ </Ww>
+ <Ww>
+ <count>27</count>
+ <WinNumber>1</WinNumber>
+ <ItemText>Ra</ItemText>
+ </Ww>
+ <Ww>
+ <count>28</count>
+ <WinNumber>1</WinNumber>
+ <ItemText>Rb</ItemText>
+ </Ww>
+ <Ww>
+ <count>29</count>
+ <WinNumber>1</WinNumber>
+ <ItemText>Da</ItemText>
+ </Ww>
+ <Ww>
+ <count>30</count>
+ <WinNumber>1</WinNumber>
+ <ItemText>Db</ItemText>
+ </Ww>
+ <Ww>
+ <count>31</count>
+ <WinNumber>1</WinNumber>
+ <ItemText>resp_rx_ts,0x0A</ItemText>
+ </Ww>
+ <Ww>
+ <count>32</count>
+ <WinNumber>1</WinNumber>
+ <ItemText>poll_tx_ts,0x0A</ItemText>
+ </Ww>
+ <Ww>
+ <count>33</count>
+ <WinNumber>1</WinNumber>
+ <ItemText>goodtimes,0x0A</ItemText>
+ </Ww>
+ <Ww>
+ <count>34</count>
+ <WinNumber>1</WinNumber>
+ <ItemText>errortimes,0x0A</ItemText>
+ </Ww>
</WatchWindow1>
<MemoryWindow1>
<Mm>
@@ -668,7 +723,7 @@
<Group>
<GroupName>STM32F1xx_StdPeriph_Driver</GroupName>
- <tvExp>0</tvExp>
+ <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
--
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