From 72d5e74bf1969d0a1429a14a4f409eddf938d66d Mon Sep 17 00:00:00 2001
From: WXK <287788329@qq.com>
Date: 星期三, 30 八月 2023 18:09:43 +0800
Subject: [PATCH] 修改uwb逻辑
---
decadriver/deca_device.c | 7 ++++---
1 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/decadriver/deca_device.c b/decadriver/deca_device.c
index 03996df..733873d 100644
--- a/decadriver/deca_device.c
+++ b/decadriver/deca_device.c
@@ -428,6 +428,7 @@
*
* returns DWT_SUCCESS for success, or DWT_ERROR for error
*/
+
int dwt_configure(dwt_config_t *config)
{
uint8_t nsSfd_result = 0;
@@ -435,7 +436,7 @@
uint8_t chan = config->chan ;
uint32_t regval ;
uint16_t reg16 = lde_replicaCoeff[config->rxCode];
- uint8_t prfIndex = dw1000local.prfIndex = config->prf - DWT_PRF_16M;
+ volatile uint8_t prfIndex = dw1000local.prfIndex = config->prf - DWT_PRF_16M;
uint8_t bw = ((chan == 4) || (chan == 7)) ? 1 : 0 ; // Select wide or narrow band
dw1000local.chan = config->chan ;
@@ -2879,7 +2880,7 @@
*/
void dwt_forcetrxoff(void)
{
- decaIrqStatus_t stat ;
+// decaIrqStatus_t stat ;
uint8_t temp ;
uint32_t mask;
@@ -3101,7 +3102,7 @@
*/
void dwt_setinterrupt(uint32_t bitmask, uint8_t enable)
{
- decaIrqStatus_t stat ;
+// decaIrqStatus_t stat ;
uint32_t mask ;
// Need to beware of interrupts occurring in the middle of following read modify write cycle
--
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