From db36f74f33fca1df7b2ac72e54178db4d14b00a2 Mon Sep 17 00:00:00 2001
From: WXK <287788329@qq.com>
Date: 星期五, 07 二月 2025 10:12:46 +0800
Subject: [PATCH] 2.11,修改重启bug当周围防撞标签多的时候

---
 Src/decadriver/deca_device.c |   45 +++++++++++++++++++++++++++++++++++++++++++--
 1 files changed, 43 insertions(+), 2 deletions(-)

diff --git a/Src/decadriver/deca_device.c b/Src/decadriver/deca_device.c
index 9cadd8b..03996df 100644
--- a/Src/decadriver/deca_device.c
+++ b/Src/decadriver/deca_device.c
@@ -154,9 +154,10 @@
 #define VTEMP_ADDRESS  (0x09)
 #define XTRIM_ADDRESS  (0x1E)
 uint8_t module_power;
+uint32_t power_temp,power_input;
 int dwt_initialise(uint16_t config)
 {
-		uint32_t power_temp,power_input;
+		
     uint8_t plllockdetect = EC_CTRL_PLLLCK;
     uint16_t otp_addr = 0;
     uint32_t ldo_tune = 0;
@@ -178,6 +179,7 @@
     }
 
     _dwt_enableclocks(FORCE_SYS_XTI); // NOTE: set system clock to XTI - this is necessary to make sure the values read by _dwt_otpread are reliable
+	 dw1000local.deviceID =  dwt_readdevid() ;
 		if(module_power>36)
 		{
 			power_temp =(module_power-36);
@@ -186,6 +188,7 @@
 		}
 	power_input= power_temp<<24|power_temp<<16|power_temp<<8|power_temp;
 	dwt_write32bitreg(TX_POWER_ID, power_input);
+		dw1000local.deviceID =  dwt_readdevid() ;
     // Configure the CPLL lock detect
     dwt_writetodevice(EXT_SYNC_ID, EC_CTRL_OFFSET, 1, &plllockdetect); 
     // Read OTP revision number
@@ -193,6 +196,7 @@
     dw1000local.otprev = (otp_addr >> 8) & 0xff;			// OTP revision is next byte
     // Load LDO tune from OTP and kick it if there is a value actually programmed.
     ldo_tune = _dwt_otpread(LDOTUNE_ADDRESS);
+		dw1000local.deviceID =  dwt_readdevid() ;
     if((ldo_tune & 0xFF) != 0)
     {
         uint8_t ldok = OTP_SF_LDO_KICK;
@@ -807,7 +811,32 @@
     //diagnostics->debug2 = dwt_read32bitoffsetreg(0x27, 0xc);
 
 }
+#define B20_SIGN_EXTEND_TEST (0x00100000UL)
+#define B20_SIGN_EXTEND_MASK (0xFFF00000UL)
+/* offset from DRX_CONF_ID in bytes to 21-bit signed RX carrier integrator value */
+#define DRX_CARRIER_INT_OFFSET  0x28
+#define DRX_CARRIER_INT_LEN     (3)
+#define DRX_CARRIER_INT_MASK    0x001FFFFF
+int32_t dwt_readcarrierintegrator(void)
+{
+    uint32_t  regval = 0 ;
+    int     j ;
+    uint8_t   buffer[DRX_CARRIER_INT_LEN] ;
 
+    /* Read 3 bytes into buffer (21-bit quantity) */
+
+    dwt_readfromdevice(DRX_CONF_ID,DRX_CARRIER_INT_OFFSET,DRX_CARRIER_INT_LEN, buffer) ;
+
+    for (j = 2 ; j >= 0 ; j --)  // arrange the three bytes into an unsigned integer value
+    {
+        regval = (regval << 8) + buffer[j] ;
+    }
+
+    if (regval & B20_SIGN_EXTEND_TEST) regval |= B20_SIGN_EXTEND_MASK ; // sign extend bit #20 to whole word
+    else regval &= DRX_CARRIER_INT_MASK ;                               // make sure upper bits are clear if not sign extending
+
+    return (int32_t) regval ; // cast unsigned value to signed quantity.
+}
 /*! ------------------------------------------------------------------------------------------------------------------
  * @fn dwt_readtxtimestamp()
  *
@@ -2132,7 +2161,19 @@
     dw1000local.sysCFGreg |= SYS_CFG_AUTOACK;
     dwt_write32bitreg(SYS_CFG_ID, dw1000local.sysCFGreg) ;
 }
-
+void dwt_enableautorxeanble(uint8_t enable)
+{
+    // Set auto ACK reply delay
+    
+    // Enable auto ACK
+	if(enable)
+	{
+    dw1000local.sysCFGreg |= SYS_CFG_RXAUTR;
+	}else{
+		dw1000local.sysCFGreg&=0xDFFFFFFF;
+	}
+    dwt_write32bitreg(SYS_CFG_ID, dw1000local.sysCFGreg) ;
+}
 /*! ------------------------------------------------------------------------------------------------------------------
  * @fn dwt_setdblrxbuffmode()
  *

--
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