#ifndef _NIMBLE_GLUE_H_ #define _NIMBLE_GLUE_H_ #include "PanSeries.h" #include "stack/ble_types.h" #include "pan_ble_stack.h" /* Here we borrow NVIC ADC IRQ as BLE event for LL interrupt offloading */ #define BLE_EVENT_PROC_IRQ ADC_IRQHandler #define BLE_EVENT_PROC_IRQn ADC_IRQn ///*constant flags to be used with ble_buff_hdr_t:ble_hdr_flags*/ //#define BLE_BUFF_HDR_STRT_PKT (1<<0) //#define BLE_BUFF_HDR_CNTRL_PKT (1<<1) //#define BLE_BUFF_HDR_BUFF_FRGMNTD (1<<2) //#define BLE_BUFF_HDR_EVNT_CMD_PCKT (1<<3) //#define BLE_BUFF_HDR_ACL_DATA_PCKT (1<<4) //#if defined __GNUC__ //#define RAM_CODE __attribute__((noinline)) __attribute__((long_call,section(".ramfunc"))) //#else //#define RAM_CODE __attribute__((section(".ramfunc"))) //#endif //#define os_Pool_Def(type) os_pool_def_t os_pool_##type //#define os_Pool(type) &os_pool_##type //#define os_Pool_Def_extern(type) extern os_pool_def_t os_pool_##type //typedef struct { // uint8_t sleep_clock_source; // uint16_t sleep_clock_accuracy; // uint8_t max_num_of_states; // int8_t tx_power; // void * (*pf_mem_init)(uint32_t size); // // // NOT Release // uint8_t link_layer_debug; // struct { // uint8_t os_drift_time; // uint8_t reg_time; // } timings; // uint8_t agc_cfg_mode; //} pan_ble_cfg; /// Priority used for thread control. typedef enum { os_priority_high, os_priority_normal, os_priority_low, } os_priority; ///* // * @brief structure that hold some information about the data transmitted across layers. // */ //typedef struct ble_buff_hdr_st //{ // uint8_t *buff_start; // struct ble_buff_hdr_st *next_pkt; // uint16_t total_len; // uint16_t data_offset; // uint16_t data_size; // uint8_t ble_hdr_flags; //} ble_buff_hdr_t, *ble_buff_hdr_p; //typedef struct _mem_blck_t //{ // /* 8 bits | 8 bits | 8 bits | 8 bits * // * Free memory chunk flag | sub-pool number | reserved | handle_id */ // uint32_t flag; // struct _mem_blck_t *next; //} mem_blck_t; //typedef struct //{ // uint32_t blck_size; /* block size */ // mem_blck_t *next_blck; /* next free block */ //} os_pool_def_t; //os_Pool_Def_extern(ble_buff_hdr_t); typedef void (*pan_ble_hci_evt_cbk)(uint8_t *p_evt, uint16_t evt_len); typedef void (*pan_ble_hci_acl_cbk)(uint8_t *p_acl, uint16_t acl_len); //extern uint32_t llhwc_slptmr_get_remain(void); extern uint8_t rf_check_sleep_state(void); extern void pan_ble_hci_init(pan_ble_hci_evt_cbk p_evt_cbk, pan_ble_hci_acl_cbk p_acl_cbk); //extern void hci_event_handler(void *handler); extern void pan_ble_init(const pan_ble_cfg *cfg); //extern void *os_mem_pool_alloc(os_pool_def_t *pool); extern void pan_ble_handle(void); extern void pan_ble_irq(void); /**API set public address */ extern uint32_t db_set_bd_address(uint8_t *bd_addr); extern void init_controller_rc_calib(void); typedef int (*PanMdcSemphrGiveCback_t)(void); typedef int (*host_copydata_t)(void *from, void *dst, uint16_t len); extern void pan_ll_register_semphr_cback(PanMdcSemphrGiveCback_t func); extern void pan_ll_register_hostcopy_cb(host_copydata_t func); extern uint32_t pan_ble_hci_acl_nimble_handle(uint8_t *p_data, uint16_t data_len); extern LlState_t LL_SetBdAddr(uint8_t *pAddr, uint32_t len); extern uint32_t pan_get_ll_idle_time(void); extern void pan_update_stimer(void); extern void pan_req_new_tx_power(int8_t txPower); #endif /* _NIMBLE_GLUE_H_ */