/* * Licensed to the Apache Software Foundation (ASF) under one * or more contributor license agreements. See the NOTICE file * distributed with this work for additional information * regarding copyright ownership. The ASF licenses this file * to you under the Apache License, Version 2.0 (the * "License"); you may not use this file except in compliance * with the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, * software distributed under the License is distributed on an * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY * KIND, either express or implied. See the License for the * specific language governing permissions and limitations * under the License. */ #include #include #include #include "os/mynewt.h" #include "nrfx.h" #include "flash_map/flash_map.h" #include "hal/hal_bsp.h" #include "hal/hal_flash.h" #include "hal/hal_system.h" #include "mcu/nrf52_hal.h" #include "mcu/nrf52_periph.h" #include "mcu/native_bsp.h" #include "bsp/bsp.h" #include "defs/sections.h" #include "uart_hal/uart_hal.h" #include "uart/uart.h" /* * What memory to include in coredump. */ static const struct hal_bsp_mem_dump dump_cfg[] = { [0] = { .hbmd_start = &_ram_start, .hbmd_size = RAM_SIZE } }; const struct hal_flash * hal_bsp_flash_dev(uint8_t id) { switch (id) { case 0: return &native_flash_dev; default: return NULL; } } const struct hal_bsp_mem_dump * hal_bsp_core_dump(int *area_cnt) { *area_cnt = sizeof(dump_cfg) / sizeof(dump_cfg[0]); return dump_cfg; } int hal_bsp_power_state(int state) { return (0); } /** * Returns the configured priority for the given interrupt. If no priority * configured, return the priority passed in * * @param irq_num * @param pri * * @return uint32_t */ uint32_t hal_bsp_get_nvic_priority(int irq_num, uint32_t pri) { uint32_t cfg_pri; switch (irq_num) { /* Radio gets highest priority */ case RADIO_IRQn: cfg_pri = 0; break; default: cfg_pri = pri; } return cfg_pri; } static void nrf52_periph_create_timers(void) { int rc; (void)rc; #if MYNEWT_VAL(TIMER_0) rc = hal_timer_init(0, NULL); assert(rc == 0); #endif #if MYNEWT_VAL(TIMER_1) rc = hal_timer_init(1, NULL); assert(rc == 0); #endif #if MYNEWT_VAL(TIMER_2) rc = hal_timer_init(2, NULL); assert(rc == 0); #endif #if MYNEWT_VAL(TIMER_3) rc = hal_timer_init(3, NULL); assert(rc == 0); #endif #if MYNEWT_VAL(TIMER_4) rc = hal_timer_init(4, NULL); assert(rc == 0); #endif #if MYNEWT_VAL(TIMER_5) rc = hal_timer_init(5, NULL); assert(rc == 0); #endif #if MYNEWT_VAL(OS_CPUTIME_TIMER_NUM) >= 0 rc = os_cputime_init(MYNEWT_VAL(OS_CPUTIME_FREQ)); assert(rc == 0); #endif } static struct uart_dev os_bsp_uart0; static struct uart_dev os_bsp_uart1; void hal_bsp_init(void) { /* Make sure system clocks have started */ hal_system_clock_start(); /* Create all available nRF52840 peripherals */ // nrf52_periph_create(); nrf52_periph_create_timers(); int rc; rc = os_dev_create((struct os_dev *) &os_bsp_uart0, "uart0", OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *) NULL); assert(rc == 0); rc = os_dev_create((struct os_dev *) &os_bsp_uart1, "uart1", OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *) NULL); assert(rc == 0); } void hal_bsp_deinit(void) { }