/*
 * Copyright (c) 2019-2023 Beijing Hanwei Innovation Technology Ltd. Co. and
 * its subsidiaries and affiliates (collectly called MKSEMI).
 *
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * 1. Redistributions of source code must retain the above copyright notice,
 *    this list of conditions and the following disclaimer.
 *
 * 2. Redistributions in binary form, except as embedded into an MKSEMI
 *    integrated circuit in a product or a software update for such product,
 *    must reproduce the above copyright notice, this list of conditions and
 *    the following disclaimer in the documentation and/or other materials
 *    provided with the distribution.
 *
 * 3. Neither the name of MKSEMI nor the names of its contributors may be used
 *    to endorse or promote products derived from this software without
 *    specific prior written permission.
 *
 * 4. This software, with or without modification, must only be used with a
 *    MKSEMI integrated circuit.
 *
 * 5. Any software provided in binary form under this license must not be
 *    reverse engineered, decompiled, modified and/or disassembled.
 *
 * THIS SOFTWARE IS PROVIDED BY MKSEMI "AS IS" AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL MKSEMI OR CONTRIBUTORS BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef MK_CLOCK_H_
#define MK_CLOCK_H_
#include "mk_common.h"

/**
 * @addtogroup MK8000_Clock
 * @{
 */

/**
 * @brief Enable or disable the peripheral clock enumeration
 */
enum CLOCK_GATE_T
{
    CLOCK_GPIO = 1,
    CLOCK_SPI0 = 2,
    CLOCK_SPI1 = 3,
    CLOCK_LSP = 4,
    CLOCK_DMA = 5,
    CLOCK_MAC = 6,
    CLOCK_UART0 = 8,
    CLOCK_UART1 = 9,
    CLOCK_I2C = 10,
    CLOCK_EFUSE = 11,
    CLOCK_TIMER0 = 12,
    CLOCK_TIMER1 = 13,
    CLOCK_TIMER2 = 14,
    CLOCK_TIMER3 = 15,
    CLOCK_WDT = 16,
    CLOCK_RTC = 17,
    CLOCK_PWM = 18,
    CLOCK_ADC = 19,
    CLOCK_TRNG = 20,
    CLOCK_FLASH_CTRL = 21,
    CLOCK_AES = 22,
    CLOCK_CALIB = 23,
    CLOCK_RX = 24,
    CLOCK_TX = 25,
    CLOCK_PHY_TIMER = 27,
};

#define CLOCK_RCO_32K 32768   /*!< Internal Oscillator, 32.768kHz RC oscillator             */
#define CLOCK_RO_48M 48000000 /*!< Internal Oscillator, 48MHz RC oscillator             */

#define CLOCK_XTAL_32K 32768     /*!< External Oscillator, 32.768kHz crystal oscillator    */
#define CLOCK_XTAL38P4M 62400000 /*!< External Oscillator, 62.4MHz = (38.4MHz * 13) / 8    */

/**
 * @brief Clock name enumeration.
 * @note This enumeration used to get clock frequency
 */
enum CLOCK_TYPE_T
{
    CLOCK_SYS_CLK,
    CLOCK_AHB_CLK,
    CLOCK_APB_CLK,
    CLOCK_WDT_CLK,
    CLOCK_32K_CLK,
    CLOCK_FLASH_CLK,
};

#define CLOCK_32K_CLK_SEL 0 /*!< 32K CLK to configure */
#define CLOCK_SYS_CLK_SEL 1 /*!< SYS CLK to configure */
#define CLOCK_WDT_CLK_SEL 2 /*!< WDT CLK to configure */

/**
 * @brief Clock source selection enumeration.
 *
 */
enum CLOCK_ATTACH_TYPE_T
{
    CLOCK_RCO32K_TO_32K_CLK = MUX(CLOCK_32K_CLK_SEL, 0),        /*!< RCO32k selected as 32k clock       */
    CLOCK_XTAL32K_TO_32K_CLK = MUX(CLOCK_32K_CLK_SEL, 1),       /*!< XTAL32.768k selected as 32K clock  */
    CLOCK_EXT32K_SINE_TO_32K_CLK = MUX(CLOCK_32K_CLK_SEL, 2),   /*!< External injection 32k sine wave selected as 32K clock  */
    CLOCK_EXT32K_SQUARE_TO_32K_CLK = MUX(CLOCK_32K_CLK_SEL, 3), /*!< External injection 32k square wave selected as 32K clock  */

    CLOCK_32K_TO_SYS_CLK = MUX(CLOCK_SYS_CLK_SEL, 0),                   /*!< 32k clk selected as system clock */
    CLOCK_48M_RO_TO_SYS_CLK = MUX(CLOCK_SYS_CLK_SEL, 1),                /*!< 48M clk selected as system clock */
    CLOCK_62P4M_XTAL38P4M_TO_SYS_CLK = MUX(CLOCK_SYS_CLK_SEL, 2),       /*!< 62.4M clk (XTAL 38.4M) selected as system clock */
    CLOCK_62P4M_EXT38P4M_SINE_TO_SYS_CLK = MUX(CLOCK_SYS_CLK_SEL, 3),   /*!< 62.4M clk (external 38.4M sine wave) selected as system clock */
    CLOCK_62P4M_EXT38P4M_SQUARE_TO_SYS_CLK = MUX(CLOCK_SYS_CLK_SEL, 4), /*!< 62.4M clk (external 38.4M square wave) selected as system clock */

    CLOCK_32K_TO_WDT_CLK = MUX(CLOCK_WDT_CLK_SEL, 0), /*!< 32k clk selected as watchdog clock */
    CLOCK_APB_TO_WDT_CLK = MUX(CLOCK_WDT_CLK_SEL, 1), /*!< APB divider clock selected as watchdog clock */
};

/**
 * @brief Divider value for AHB and APB divider.
 *
 */
enum CLOCK_BUS_DIVIDER_VAL_T
{
    CLOCK_DIVIDED_BY_1 = 0, /*!< Clock divided by 1 */
    CLOCK_DIVIDED_BY_2 = 1, /*!< Clock divided by 2 */
    CLOCK_DIVIDED_BY_4 = 2, /*!< Clock divided by 4 */
    CLOCK_DIVIDED_BY_8 = 3, /*!< Clock divided by 8 */
};

/**
 * @brief Frequency divided objects enumeration.
 */
enum CLOCK_DIVIDER_T
{
    CLOCK_AHB_DIV,        /*!< AHB clock is divided by (1/2/4/8)   */
    CLOCK_APB_DIV,        /*!< APB clock is divided by (1/2/4/8)   */
    CLOCK_FLASH_CTRL_DIV, /*!< Flash controller clock divided by (1/2/4/8) */
    CLOCK_UART1_FDIV,     /*!< UART1 function clock fractional ms/ns divider */
    CLOCK_UART0_FDIV,     /*!< UART1 function clock fractional ms/ns divider */
};

/**
 * @brief XTAL injection type.
 */
enum CLOCK_XTAL_INJECTION_TYPE_T
{
    CLOCK_XTAL_INJECTION_SQUARE = 1, /*!< External input square wave */
    CLOCK_XTAL_INJECTION_SINE = 2,   /*!< External input sine wave */
};

#ifdef __cplusplus
extern "C" {
#endif

/**
 * @brief Enable the peripheral clock
 *
 * @param[in] clk           Peripheral type @ref CLOCK_GATE_T
 */
void clock_enable(enum CLOCK_GATE_T clk);

/**
 * @brief Disable the peripheral clock
 *
 * @param[in] clk           Peripheral type @ref CLOCK_GATE_T
 */
void clock_disable(enum CLOCK_GATE_T clk);

/**
 * @brief  Function for setting the selected clock source.
 *
 * @param[in] connection    Clock source selection @ref CLOCK_ATTACH_TYPE_T
 */
void clock_attach(enum CLOCK_ATTACH_TYPE_T connection);

/**
 * @brief Function for dividing current clock
 * @note For details about the UARTx frequency division, see uart_baud_set() function of mk_uart.c.
 * @param[in] div_name      Frequency divided objects @ref CLOCK_DIVIDER_T
 * @param[in] div_value     Frequency divided value
 */
void clock_set_divider(enum CLOCK_DIVIDER_T div_name, uint8_t div_value);

/**
 * @brief Function for getting clock frequency.
 *
 * @param[in] clk_name      Clock type @ref CLOCK_TYPE_T
 * @return Frequency value
 */
uint32_t clock_get_frequency(enum CLOCK_TYPE_T clk_name);

/**
 * @brief Set XTAL 38.4MHz clock injection type.
 *
 * @param[in] type          XTAL injection type @ref CLOCK_TYPE_T
 */
void clock_xtal38m4_injection_set(enum CLOCK_XTAL_INJECTION_TYPE_T type);

/**
 * @brief Set XTAL 32KHz clock injection type.
 *
 * @param[in] type          XTAL injection type @ref CLOCK_TYPE_T
 */
void clock_xtal32k_injection_set(enum CLOCK_XTAL_INJECTION_TYPE_T type);

#ifdef __cplusplus
}
#endif

/**
 * @}
 */

#endif /* MK_CLOCK_H_ */