/* * Copyright (c) 2019-2023 Beijing Hanwei Innovation Technology Ltd. Co. and * its subsidiaries and affiliates (collectly called MKSEMI). * * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * * 2. Redistributions in binary form, except as embedded into an MKSEMI * integrated circuit in a product or a software update for such product, * must reproduce the above copyright notice, this list of conditions and * the following disclaimer in the documentation and/or other materials * provided with the distribution. * * 3. Neither the name of MKSEMI nor the names of its contributors may be used * to endorse or promote products derived from this software without * specific prior written permission. * * 4. This software, with or without modification, must only be used with a * MKSEMI integrated circuit. * * 5. Any software provided in binary form under this license must not be * reverse engineered, decompiled, modified and/or disassembled. * * THIS SOFTWARE IS PROVIDED BY MKSEMI "AS IS" AND ANY EXPRESS OR IMPLIED * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL MKSEMI OR CONTRIBUTORS BE LIABLE FOR ANY * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "mk_efuse.h" #include "mk_clock.h" #include "mk_reset.h" #include "mk_trace.h" int efuse_open(void) { // enable EFUSE clock clock_enable(CLOCK_EFUSE); reset_module(RESET_MODULE_EFUSE); return DRV_OK; } int efuse_close(void) { // disable EFUSE clock clock_disable(CLOCK_EFUSE); EFUSE_CTRL->CTRL = EFUSE_CTRL_POWER_DOWN_MSK; return DRV_OK; } void efuse_reset(void) { EFUSE_CTRL->CTRL = EFUSE_CTRL_SOFT_RST_MSK; } /* * Load eFuse content to the shadow register */ void efuse_reload_all(void) { EFUSE_CTRL->CTRL = EFUSE_CTRL_ACCESS_EN_MSK | EFUSE_CTRL_ACCESS_MODE(EFUSE_LOAD_ALL); while (EFUSE_CTRL->SEQUENCE_CNT & EFUSE_SEQUENCE_CNT_BUSY_MSK) { } } /* * Reload and read shadow register */ uint32_t efuse_read_word(uint16_t word_addr) { ASSERT((word_addr & 0x3) == 0, "The address need word alignment"); ASSERT(word_addr < 128, "The operation address is over range"); EFUSE_CTRL->ADDR = EFUSE_ADDR_BYTE_ADDR(word_addr); EFUSE_CTRL->CTRL = EFUSE_CTRL_ACCESS_EN_MSK | EFUSE_CTRL_ACCESS_MODE(EFUSE_LOAD_WORD); while (EFUSE_CTRL->SEQUENCE_CNT & EFUSE_SEQUENCE_CNT_BUSY_MSK) { } return REG_READ(EFUSE_SHADOW_BASE | word_addr); } uint8_t efuse_read_byte(uint16_t byte_addr) { ASSERT(byte_addr < 128, "The operation address is over range"); EFUSE_CTRL->ADDR = EFUSE_ADDR_BYTE_ADDR(byte_addr); EFUSE_CTRL->CTRL = EFUSE_CTRL_ACCESS_EN_MSK | EFUSE_CTRL_ACCESS_MODE(EFUSE_LOAD_BYTE); while (EFUSE_CTRL->SEQUENCE_CNT & EFUSE_SEQUENCE_CNT_BUSY_MSK) { } return REG_READ_BYTE(EFUSE_SHADOW_BASE | byte_addr); } void efuse_read_block(uint16_t byte_addr_start, uint16_t byte_len, uint8_t *buf) { ASSERT(byte_addr_start + byte_len < 128, "The operation address is over range"); ASSERT(buf != NULL, "The read buffer pointer is null"); EFUSE_CTRL->ADDR = EFUSE_ADDR_BYTE_ADDR(byte_addr_start); EFUSE_CTRL->LENGTH = byte_len; EFUSE_CTRL->CTRL = EFUSE_CTRL_ACCESS_EN_MSK | EFUSE_CTRL_ACCESS_MODE(EFUSE_LOAD_BLOCK); while (EFUSE_CTRL->SEQUENCE_CNT & EFUSE_SEQUENCE_CNT_BUSY_MSK) { } for (uint16_t i = 0; i < byte_len; i++) { *buf++ = REG_READ_BYTE(EFUSE_SHADOW_BASE | (byte_addr_start + i)); } } /* * Program eFuse */ void efuse_program_word(uint16_t word_addr, uint32_t data) { ASSERT((word_addr & 0x3) == 0, "The address need word alignment"); ASSERT(word_addr > 0, "The first byte need to be programmed by bit"); ASSERT(word_addr < 128, "The operation address is over range"); SYSCON->EFUSE_LDO = 0x01; REG_WRITE(EFUSE_SHADOW_BASE | word_addr, data); EFUSE_CTRL->ADDR = EFUSE_ADDR_BYTE_ADDR(word_addr); EFUSE_CTRL->CTRL = EFUSE_CTRL_ACCESS_EN_MSK | EFUSE_CTRL_ACCESS_MODE(EFUSE_PROGRAM_WORD); while (EFUSE_CTRL->SEQUENCE_CNT & EFUSE_SEQUENCE_CNT_BUSY_MSK) { } SYSCON->EFUSE_LDO = 0x00; } void efuse_program_byte(uint16_t byte_addr, uint8_t data) { ASSERT(byte_addr > 0, "The first byte need to be programmed by bit"); ASSERT(byte_addr < 128, "The operation address is over range"); SYSCON->EFUSE_LDO = 0x01; REG_WRITE_BYTE(EFUSE_SHADOW_BASE | byte_addr, data); EFUSE_CTRL->ADDR = EFUSE_ADDR_BYTE_ADDR(byte_addr); EFUSE_CTRL->CTRL = EFUSE_CTRL_ACCESS_EN_MSK | EFUSE_CTRL_ACCESS_MODE(EFUSE_PROGRAM_BYTE); while (EFUSE_CTRL->SEQUENCE_CNT & EFUSE_SEQUENCE_CNT_BUSY_MSK) { } SYSCON->EFUSE_LDO = 0x00; } /* set bit to 1, bit_offset: 0 ~ 7 */ void efuse_set_bit(uint16_t byte_addr, uint8_t bit_offset) { ASSERT(byte_addr < 128, "The operation address is over range"); ASSERT(bit_offset < 8, "The operation bit offset is over range"); SYSCON->EFUSE_LDO = 0x01; if (byte_addr == EFUSE_STATUS) { EFUSE_CTRL->ADDR = EFUSE_ADDR_BYTE_ADDR(byte_addr) | EFUSE_ADDR_BIT_OFFSET(bit_offset); EFUSE_CTRL->CTRL = EFUSE_CTRL_ACCESS_EN_MSK | EFUSE_CTRL_ACCESS_MODE(EFUSE_PROGRAM_BIT); } else { uint8_t val = REG_READ_BYTE(EFUSE_SHADOW_BASE | byte_addr); REG_WRITE_BYTE(EFUSE_SHADOW_BASE | byte_addr, (uint8_t)(val | (1 << (bit_offset & 0x7)))); EFUSE_CTRL->ADDR = EFUSE_ADDR_BYTE_ADDR(byte_addr) | EFUSE_ADDR_BIT_OFFSET(bit_offset); EFUSE_CTRL->LENGTH = 1; EFUSE_CTRL->CTRL = EFUSE_CTRL_ACCESS_EN_MSK | EFUSE_CTRL_ACCESS_MODE(EFUSE_PROGRAM_BLOCK); } while (EFUSE_CTRL->SEQUENCE_CNT & EFUSE_SEQUENCE_CNT_BUSY_MSK) { } SYSCON->EFUSE_LDO = 0x00; }