/*
 * Copyright (c) 2019-2023 Beijing Hanwei Innovation Technology Ltd. Co. and
 * its subsidiaries and affiliates (collectly called MKSEMI).
 *
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * 1. Redistributions of source code must retain the above copyright notice,
 *    this list of conditions and the following disclaimer.
 *
 * 2. Redistributions in binary form, except as embedded into an MKSEMI
 *    integrated circuit in a product or a software update for such product,
 *    must reproduce the above copyright notice, this list of conditions and
 *    the following disclaimer in the documentation and/or other materials
 *    provided with the distribution.
 *
 * 3. Neither the name of MKSEMI nor the names of its contributors may be used
 *    to endorse or promote products derived from this software without
 *    specific prior written permission.
 *
 * 4. This software, with or without modification, must only be used with a
 *    MKSEMI integrated circuit.
 *
 * 5. Any software provided in binary form under this license must not be
 *    reverse engineered, decompiled, modified and/or disassembled.
 *
 * THIS SOFTWARE IS PROVIDED BY MKSEMI "AS IS" AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL MKSEMI OR CONTRIBUTORS BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef MK_I2C_H_
#define MK_I2C_H_
#include "mk_common.h"

#ifndef I2C_INT_MODE_EN
#define I2C_INT_MODE_EN (1)
#endif

#ifndef I2C_POLL_MODE_EN
#define I2C_POLL_MODE_EN (1)
#endif

/**
 * @addtogroup MK8000_I2C
 * @{
 */

// I2C device addresses
#define MK_DEV_ADDRESS 0x4A

/*
 * These minimum high and low times are in nanoseconds.  They represent
 * the minimum amount of time a bus signal must remain either high or
 * low to be interpreted as a logical high or low as per the I2C bus
 * protocol.  These values are used in conjunction with an I2C input
 * clock frequency to determine the correct values to be written to the
 * clock count registers.
 */
#define I2C_MIN_SS_SCL_HIGH_TIME 480 /*!< Standard mode the low period of the SCL clock 5us */
#define I2C_MIN_SS_SCL_LOW_TIME 480  /*!< Standard mode the high period of the SCL clock 5us */
#define I2C_MIN_FS_SCL_HIGH_TIME 100 /*!< Fast mode the low period of the SCL clock 1.2us */
#define I2C_MIN_FS_SCL_LOW_TIME 110  /*!< Fast mode the high period of the SCL clock 1.3us */
#define I2C_MIN_HS_SCL_HIGH_TIME 10  /*!< High mode the low period of the SCL clock 300ns */
#define I2C_MIN_HS_SCL_LOW_TIME 12   /*!< High mode the high period of the SCL clock 300ns */

/* I2C synchronization timeout */
#define I2C_DLY_10US (10)
#define I2C_WAIT_ACT_CNT (100000)
#define I2C_WAIT_TFNF_CNT (100000)
#define I2C_WAIT_TFE_CNT (100000)
#define I2C_WAIT_RFNE_CNT (100000)

// error code (bits 0 - 11 reserved for interrupt status)
#define I2C_ERR_ACT_TIMEOUT (1 << 12)
#define I2C_ERR_TFNF_TIMEOUT (1 << 13)
#define I2C_ERR_TFE_TIMEOUT (1 << 14)
#define I2C_ERR_RFNE_TIMEOUT (1 << 15)

/* I2C device instance */
enum I2C_DEV_T
{
    I2C_ID0 = 0,
    I2C_MAX_NUM
};

enum I2C_MODE_T
{
    I2C_MASTER,
    I2C_SLAVE,
};

enum I2C_SPEED_MODE_T
{
    I2C_SPEED_STANDARD = I2C_CTRL1_STANDARD_SPEED, /*!< Standard mode speed (100 kbps) */
    I2C_SPEED_FAST = I2C_CTRL1_FAST_SPEED,         /*!< Fast mode speed (400 kbps) */
    I2C_SPEED_HIGH = I2C_CTRL1_HIGH_SPEED,         /*!< High mode speed (1600 kbps) */
};

enum I2C_ADDR_MODE_T
{
    I2C_7BIT_ADDR = 0, // 7-bit address mode
    I2C_10BIT_ADDR = 1 // 10-bit address mode
};

enum I2C_TXFIFO_LEVEL_T
{
    I2C_TXFIFO_EMPTY = 0,
    I2C_TXFIFO_CHAR_1 = 1, // 1 entry triggers the TX_EMPTY interrupt
    I2C_TXFIFO_QUARTER_FULL = 2,
    I2C_TXFIFO_HALF_FULL = 4,
};

enum I2C_RXFIFO_LEVEL_T
{
    I2C_RXFIFO_CHAR_1 = 0, // 1 entry triggers the RX_FULL interrupt
    I2C_RXFIFO_QUARTER_FULL = 1,
    I2C_RXFIFO_HALF_FULL = 3,
};

enum I2C_STATE_T
{
    I2C_STATE_RESET = 0x00U,
    I2C_STATE_READY = 0x01U,
    I2C_STATE_BUSY_TX = 0x10U,
    I2C_STATE_BUSY_RX = 0x20U,
    I2C_STATE_BUSY_TX_RX = 0x30U,
    I2C_STATE_TIMEOUT = 0x40U,
    I2C_STATE_ERROR = 0x80U,
};

struct I2C_CFG_T
{
    enum I2C_MODE_T mode;
    enum I2C_SPEED_MODE_T speed_mode;
    enum I2C_RXFIFO_LEVEL_T rx_level;
    enum I2C_TXFIFO_LEVEL_T tx_level;
    enum I2C_ADDR_MODE_T addr_mode;
    uint16_t local_addr;
    uint16_t target_addr;
    uint8_t int_rx;
    uint8_t int_tx;
    uint8_t reserved[2];
};

struct I2C_HANDLE_T
{
    I2C_TypeDef *const base;
    const IRQn_Type irq;
    enum I2C_STATE_T state;
    struct I2C_CFG_T config;
    uint8_t *tx_buff;        /*!< Pointer to I2C Tx transfer Buffer */
    uint32_t tx_size;        /*!< I2C Tx Transfer size              */
    __IOM uint32_t tx_count; /*!< I2C Tx Transfer Counter           */
    uint8_t *rx_buff;        /*!< Pointer to I2C Rx transfer Buffer */
    uint32_t rx_size;        /*!< I2C Rx Transfer size              */
    __IOM uint32_t rx_count; /*!< I2C Rx Transfer Counter           */
    drv_callback_t tx_callback;
    drv_callback_t rx_callback;
};

#ifdef __cplusplus
extern "C" {
#endif

int i2c_open(enum I2C_DEV_T id, struct I2C_CFG_T *config);
int i2c_close(enum I2C_DEV_T id);

int i2c_master_send(enum I2C_DEV_T id, uint16_t dev_addr, uint8_t *tx_buf, uint32_t len, drv_callback_t callback);
int i2c_master_receive(enum I2C_DEV_T id, uint16_t dev_addr, uint8_t *rx_buf, uint32_t len, drv_callback_t callback);
int i2c_master_transfer(enum I2C_DEV_T id, uint16_t dev_addr, uint8_t *tx_buf, uint32_t tx_len, uint8_t *rx_buf, uint32_t rx_len, drv_callback_t callback);

int i2c_slave_send(enum I2C_DEV_T id, uint8_t *tx_buf, uint32_t len, drv_callback_t callback);
int i2c_slave_receive(enum I2C_DEV_T id, uint8_t *rx_buf, uint32_t len, drv_callback_t callback);

enum I2C_STATE_T i2c_state_get(enum I2C_DEV_T id);

void I2C0_IRQHandler(void);

#ifdef __cplusplus
}
#endif

/**
 * @}
 */

#endif /* MK_I2C_H_ */